[Techtoolslist] Logic levels question 6502A (Missile command)

David Shoemaker davids at oz.net
Sat Nov 5 22:00:20 EDT 2011


What really got me is I pulled all the roms, and put only the "bad" rom in.
It passed the rom test on loop for 30 minutes no problem. I put the rom
next to it back in and BANG right back to failures. But that second rom
passes just fine.

That is when I noticed the lowish address line values.

-----Original Message-----
From: techtoolslist-bounces at flippers.com
[mailto:techtoolslist-bounces at flippers.com] On Behalf Of Rodger Boots
Sent: Saturday, November 05, 2011 6:21 PM
To: Technical Tools Mail List
Subject: Re: [Techtoolslist] Logic levels question 6502A (Missile command)

If you have it to one ROM it's probably the chip select line to that one
part. And the signature changing would tend to indicate a timing problem
such as a slow ROM or sloppy logic levels on that one line.
On Nov 5, 2011 7:57 PM, "David Shoemaker" <davids at oz.net> wrote:


> Well sounds like that theory is shot.

>

> I pulled all the roms then using the fluke I did a read on one of the

> addresses looping. The fluke reports a series of values that builds

> up to FF (there are pullup resistors on all the data lines so I

> expected the value to be FF and stay there.

>

> I will check the voltage at the pullups.

>

> The fluke reports all ram tests ok (so I figure the 244's are ok).

> And only one rom reports bad. I checked it in my burner and it is

> fine there. I burnt a new one anyhow and it reported the same

> failure.

>

> One thing about the rom test failing is the signature is not constant.

>

> Any other suggestions?

>

> Thanks,

> David

>

>

> -----Original Message-----

> From: techtoolslist-bounces at flippers.com

> [mailto:techtoolslist-bounces at flippers.com] On Behalf Of John

> Robertson

> Sent: Saturday, November 05, 2011 2:20 PM

> To: Technical Tools Mail List

> Subject: Re: [Techtoolslist] Logic levels question 6502A (Missile

> command)

>

> David Shoemaker wrote:

> > I am trying to trouble shoot a board. I am getting some odd

> > responses reading the roms. I noticed that the address lines coming

> > from the 6502 seem to be going high at 3.5 - 3.7 vdc. I suspect

> > this is causing some

> of

> > the ttl to not latch high.

> >

> >

> >

> > This is checked through a meter using the fluke to read a particular

> address

> > on a loop and using my scope for the same and while running the game.

> >

> >

> >

> > Is this a normal value? I don't see any pull-ups on the address

> > lines on the schematic.

> >

> >

> >

> > David

> >

>

> Don't forget the Fluke pod has it's own address and data line buffering.

> There are notes about watching out for that in the pod manuals...

>

> Input Low Voltage ..... 0.8V max.

> Input High Voltage...... 2.0V min., +5.0V max.

> Output High Voltage ... 2.4Vmin. with loh = -250ua

>

> etc. (Page 1-4, 6502 Instruction manual)

>

> John :-#)#

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