[Techtoolslist] 9010A Z80 pod and the !IORQ line

[John Robertson]

On 2024/02/11 11:57 p.m., davids at oz.net wrote:
> Thanks John,
> I looked through the manual before sending the mail (and posting to the FB group) and missed that paragraph.  Though now that I know it was there I found it easy enough.
>
> Can get the 9010 to read the portB from the 8255 (dip switch value), though no matter what I can't seem to set the control byte in a manner that I can actually write through the 8255.  Frustrating.
>
> Trying for operating mode 0, config 2 (PortA output, PortB input, PortC output) should just be a write to 0x10007 = 0x82.  Then writing PortC should just be 0x10006 = 0x??.  But no matter how I write the values of PortC are just tristate.
>
> Also I can't get Run UUT to work, I have 4 different of these Gameplan MPU-2's, one of which is known working perfectly.  But pulling the CPU and connecting my z80QT pod then hitting Run UUT, the board just freaks out, rebooting constantly, I assume the watchdog is hitting but even bypassing that the board just won't boot correctly.
>
> Buss / Rom / Ram tests pass fine just wont Run UUT.
>
> David

Try a faster CPU in the pod?

Its been a while since I last ran GP MPU on the QT-Z80 and can't recall 
if it works or not on Run UUT. I have to check a GP MPU tomorrow so will 
let you know.

John:-#)#

>
> -----Original Message-----
> From: Techtoolslist <techtoolslist-bounces at flippers.com> On Behalf Of John Robertson via Techtoolslist
> Sent: Sunday, February 11, 2024 6:57 PM
> To: Technical Tools Mail List <techtoolslist at flippers.com>
> Cc: John Robertson <jrr at flippers.com>
> Subject: Re: [Techtoolslist] 9010A Z80 pod and the !IORQ line
>
>
> On Feb 11, 2024, at 2:31 PM, davids at oz.net wrote:
>> Z80 pod and the !IORQ line. Working on a GamePlan MPU-2 board.
>>
>>
>>
>> Address space looks like:
>>
>> 0x0000-0x1000 ROM
>>
>> 0x0004 8255 Port A
>>
>> 0x0005 8255 Port B
>>
>> 0x0006 8255 Port C
>>
>> 0x0007 8255 Control
>>
>> 0x0008 Z80 CTC Ch1
>>
>> 0x0009 Z80 CTC Ch2
>>
>> 0x000A Z80 CTC Ch3
>>
>> 0x000B Z80 CTC Ch4
>>
>>
>>
>> Looking over the schematic I can see that the chip select lines for
>> the 8255 and CTC are tied the Z80 !IORQ pin (20).
>>
>>
>>
>> Makes sense, only interface with the two peripherals when you need too
>> so you can overlap the address space.
>>
>>
>>
>> But from the 9010A how do I control that I am reading / writing to
>> those devices?
>>
>>
>>
>> Thanks,
>>
>> David
>>
>>
> Z80 IO requests are above FFFFh. I think they are 10000 to 10003h as I recall.
>
> The Z80 pod manual covers this…
>
> John :-#)#
>
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